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| STD5N20 N-CHANNEL 200V - 0.6 - 5A DPAK MESH OVERLAYTM MOSFET TYPE STD5N20 s s s s VDSS 200 V RDS(on) < 0.8 ID 5A TYPICAL RDS(on) = 0.6 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED ADD SUFFIX "T4" FOR OREDERING IN TAPE & REEL 3 1 DPAK TO-252 DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company's proprietary edge termination structure, makes it suitable in coverters for lighting applications. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITH MODE POWER SUPPLIES (SMPS) s DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (l) PTOT dv/dt (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 200 200 20 5 3.5 20 45 0.36 5 -65 to 150 150 (1)ISD 5A, di/dt 300A/s, V DD V(BR)DSS, Tj TJMAX. (**) Limited only by Maximum Temperature Allowed Unit V V V A A A W W/C V/ns C C (*)Pulse width limited by safe operating area December 2000 1/8 STD5N20 THERMAL DATA Rthj-case Rthj-amb Rthc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 2.77 100 1.5 275 C/W C/W C/W C AVALANCHE CHARACTERISTICS Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 5 130 Unit A mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V Min. 200 1 50 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 2.5 A VDS > ID(on) x RDS(on)max, VGS = 10V Min. 2 Typ. 3 0.7 Max. 4 0.8 Unit V 5 A DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. 1.5 Typ. 4 350 70 35 Max. Unit S pF pF pF 2/8 STD5N20 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 100 V, ID = 3 A RG = 4.7 VGS = 10 V (see test circuit, Figure 3) VDD = 160V, ID = 6 A, VGS = 10V Min. Typ. 18 30 19 4.5 7.5 27 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 160V, ID = 6 A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 40 10 65 Max. Unit ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 6 A, VGS = 0 ISD =6 A, di/dt = 100A/s VDD = 100V, Tj = 150C (see test circuit, Figure 5) 155 700 9 Test Conditions Min. Typ. Max. 6 24 1.5 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STD5N20 Output Characteristics Tranfer Characteristics Tranconductance Static Drain-Source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STD5N20 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STD5N20 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STD5N20 TO-252 (DPAK) MECHANICAL DATA mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 V2 0.60 0o 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 6.40 4.40 9.35 0.8 1.00 8o 0.024 0o TYP. MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 6.60 4.60 10.10 MIN. 0.087 0.035 0.001 0.025 0.204 0.018 0.019 0.236 0.252 0.173 0.368 0.031 0.039 0o inch TYP. MAX. 0.094 0.043 0.009 0.035 0.213 0.024 0.024 0.244 0.260 0.181 0.398 DIM. P032P_B 7/8 STD5N20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com 8/8 |
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